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  cystech electronics corp. spec. no. : c733l3 issued date : 2012.02.14 revised date : page no. : 1/8 MTP2955L3 cystek product specification p-channel enhancement mode power mosfet MTP2955L3 bv dss -60v i d -4.8a 75m (typ.) r dson @v gs =-10v, i d =-2.4a 74m (typ.) r dson @v gs =-10v, i d =-1.5a features 70m (typ.) r dson @v gs =-10v, i d =-0.75a ? simple drive requirement r dson @v gs =-4.5v, i d =-1.7a 99m (typ.) ? low on-resistance ? fast switching characteristic ? pb-free lead plating package symbol outline absolute maximum ratings (ta=25 c) MTP2955L3 sot-223 d s g gate d d drain s source g parameter symbol limits unit drain-source voltage v ds -60 v gate-source voltage v gs 20 v i d -4.8 *1 a continuous drain current @ t a =25 c continuous drain current @ t a =70 c i d -3.8 *1 a pulsed drain current i dm -20 *1 a 2.7 *2 w total power dissipation (t a =25 ) pd 0.02 w/ c linear derating factor operating junction and storage temperature tj, tstg -55~+150 c note : *1 . pulse width limited by maximum junction temperature *2 . surface mounted on 1 in 2 copper pad of fr-4 board; 120 c/w when mounted on minimum copper pad
cystech electronics corp. spec. no. : c733l3 issued date : 2012.02.14 revised date : page no. : 2/8 MTP2955L3 cystek product specification thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 14 c/w thermal resistance, junction-to-ambient, max r th,j-a 45 (note) c/w note : surface mounted on 1 in 2 copper pad of fr-4 board; 120 c/w when mounted on minimum copper pad characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -60 - - v v gs =0, i d =-250 a bv dss / tj - -0.04 - v/ c reference to 25c, i d =-1ma v gs(th) -1.0 -1.9 -2.5 v v ds = v gs , i d =-250 a g fs - 5 - s v ds =-10v, i d =-3a i gss - - 100 na v gs = 20 i dss - - -1 a v ds =-48v, v gs =0 i dss - - -25 a v ds =-48v, v gs =0, tj=70 c - 75 100 v gs =-10v, i d =-2.4a - 74 100 v gs =-10v, i d =-1.5a - 70 90 v gs =-10v, i d =-0.75a *r ds(on) - 99 120 m v gs =-4.5v, i d =-1.7a dynamic *qg - 14 - *qgs - 3.2 - *qgd - 5.2 - nc i d =-4.8a, v ds =-30v, v gs =-10v *t d(on) - 10 - *tr - 7 - *t d(off) - 43 - *t f - 25 - ns v ds =-30v, i d =-1a,v gs =-10v, r g =6 ciss - 939 - coss - 54 - crss - 39 - pf v gs =0v, v ds =-25v, f=1mhz source-drain diode *v sd - - -1.2 v i s =-2a, v gs =0v *trr - 29 - ns *qrr - 20 - nc i s =-4.8a, v gs =0, di/dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping marking MTP2955L3 sot-223 (pb-free lead plating package) 2500 pcs / tape & reel 2955
cystech electronics corp. spec. no. : c733l3 issued date : 2012.02.14 revised date : page no. : 3/8 MTP2955L3 cystek product specification typical characteristics typical output characteristics 0 4 8 12 16 20 024681 0 -v ds , drain-source voltage(v) -i d , drain current(a) -v gs =2.5v 3 v 3.5v 4.5v 4v 10 v 5v 9v 8v 7v 6v brekdown voltage vs ambient temperature 50 55 60 65 70 75 80 -100 -50 0 50 100 150 200 tj, junction temperature(c) -bv dss , drain-source breakdown voltage (v) i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 1000 0.001 0.01 0.1 1 10 100 -i d , drain current(a) r ds( on) , static drain-source on-state resistance(m) v gs =-3v v gs =-4.5v v gs =-10v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 1.4 0 5 10 15 20 -i dr , reverse drain current(a) -v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 40 80 120 160 200 240 280 320 360 400 024681 0 drain-source on-state resistance vs junction tempearture 50 60 70 80 90 100 110 120 130 140 150 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , static drain-source on-state resistance(m) v gs =-4.5v, i d =-1.7a v gs =-10v, i d =-2.4a v gs =-10v, i d =-0.75a -v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance(m) i d =-2.4a i d =-1.5a i d =-0.75 a
cystech electronics corp. spec. no. : c733l3 issued date : 2012.02.14 revised date : page no. : 4/8 MTP2955L3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 -60 -20 20 60 100 140 tj, junction temperature(c) -v gs( th) , threshold voltage(v) i d =-250 a maximum safe operating area 0.01 0.1 1 10 100 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current(a) dc 100m 100 s 10 s r ds( on) limit t c =25c, tj=150, v gs =10v single pulse 10ms 1ms gate charge characteristics 0 2 4 6 8 10 048121 qg, total gate charge(nc) -v gs , gate-source voltage(v) 6 v ds =-30v i d =-4.8a maximum drain current vs case temperature 0 1 2 3 4 5 6 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maximum drain current(a) t a =25c, v gs =10v typical transfer characteristics 0 5 10 15 20 25 30 35 0246810 -v gs , gate-source voltage(v) -i d , drain current(a) v ds =-5v
cystech electronics corp. spec. no. : c733l3 issued date : 2012.02.14 revised date : page no. : 5/8 MTP2955L3 cystek product specification typical characteristics(cont.) power derating curve 0 1 2 3 4 0 20 40 60 80 100 120 140 160 t a , ambient temperature() p d , power dissipation(w) forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 -i d , drain current(a) g fs , forward transfer admittance(s) pulsed ta=25c v ds =-5v v ds =-10v transient thermal response curves 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 t 1 , square wave pulse duration(s) r(t), normalized effectivetransient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =120 c/w
cystech electronics corp. spec. no. : c733l3 issued date : 2012.02.14 revised date : page no. : 6/8 MTP2955L3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c733l3 issued date : 2012.02.14 revised date : page no. : 7/8 MTP2955L3 cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds ? time(ts min to ts max ) time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c733l3 issued date : 2012.02.14 revised date : page no. : 8/8 MTP2955L3 cystek product specification sot-223 dimension *: typical inches millimeters 321 f b a c d e g h a1 a2 i style: pin 1.gate 2.drain 3.source marking: 3-lead sot-223 plastic surface mounted package cystek package code: l3 date code device name 2955 inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.1142 0.1220 2.90 3.10 g 0.0551 0.0709 1.40 1.80 b 0.2638 0.2874 6.70 7.30 h 0.0098 0.0138 0.25 0.35 c 0.1299 0.1457 3.30 3.70 i 0.0008 0.0039 0.02 0.10 d 0.0236 0.0315 0.60 0.80 a1 *13 o - *13 o - e *0.0906 - *2.30 - a2 0 o 10 o 0 o 10 o f 0.2480 0.2638 6.30 6.70 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .


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